This is the job. It has been the job for thirty years.
What’s changing now is who, or rather what, sits next to you while you do it.
Generative AI has moved from “interesting demo” to something quietly showing up in EDA flows, verification environments, and even floorplanning sessions. The shift isn’t loud. There’s no single product launch you can point to. But if you talk to design teams in 2026, something is different. The work is being approached differently. And the people doing it are starting to think about themselves differently too.
Why this moment feels different
We’ve had automation in chip design for decades. Synthesis tools, place-and-route, formal verification engines. None of that was new. What’s new is that the automation has started to feel less like a deterministic transform and more like a collaborator that has opinions.
Ask a modern AI assistant to generate a UART controller in SystemVerilog. It will. Ask it to add backpressure handling. It will adjust. Ask it why it picked a particular FSM encoding and it will explain itself. Sometimes the explanation is wrong, which is its own problem. But the conversation is happening, and a year ago it wasn’t.
That’s the real shift. Not that AI can write RTL. It’s that the design loop has gotten shorter for a category of work that used to take days.
RTL generation: useful, but not magic
Let me be honest about what AI copilots actually do well in RTL today. They’re good at boilerplate. AXI wrappers, register file generation, basic FSMs, clock domain crossing primitives that follow a known template. The kind of code that an experienced engineer can write in their sleep but still takes two hours because of all the typing.
For that work, the productivity gain is real. I’ve seen teams cut a few days off a block bring-up by letting a copilot handle the scaffolding while the engineer focuses on the actual logic.
Where it falls apart is anywhere the design has hidden constraints. Power domain crossings the model doesn’t know about. A clock tree quirk that lives in the spec but not in the prompt. A protocol corner case that only shows up after you’ve simulated it for six hours. The AI confidently produces code that looks correct, synthesizes cleanly, and silently violates an assumption nobody told it about.
So the engineer’s job is shifting. Less typing. More reviewing. More asking yourself “what did this thing assume that I didn’t say out loud?”
That’s a real skill, and we should probably start training for it explicitly.
Verification is where the bigger story is
If RTL generation is interesting, verification is where AI is going to actually rewrite the economics of chip design.
Verification eats roughly 60 to 70 percent of the SoC schedule. Stimulus generation, coverage closure, debug, regression triage. It’s the part of the project that always slips. It’s also the part where you have lots of structured data, lots of repetitive analysis, and lots of patterns that humans miss because there are simply too many waveforms to look at.
This is where generative AI is starting to earn its keep.
Coverage closure is the obvious one. Modern tools can look at a coverage hole, infer what kind of stimulus would close it, and generate a constrained-random sequence to try. Not always right on the first attempt. But faster than a human engineer staring at a coverage report at 11pm on a Friday.
Debug is the less obvious one, and arguably the bigger deal. When a regression fails, the bottleneck has always been someone reading the log, opening the waveform, tracing back to the root cause. AI-assisted triage can do the first pass, cluster failures by likely cause, and surface the top few signals worth looking at. The engineer still confirms. The engineer is still responsible. But the time from “test failed” to “I know what’s wrong” can drop from hours to minutes.
When you compound that across a regression suite running thousands of tests a night, the math gets serious very quickly.
What “AI-native” actually means
There’s a term getting thrown around lately. AI-native EDA. I want to be careful with it, because it’s the kind of phrase that ends up in marketing decks before anyone agrees on what it means.
Here’s my working definition. A traditional EDA tool was built assuming a human would drive every decision. An AI-native tool is built assuming an AI agent will drive most decisions and a human will supervise. The interface, the data model, the way feedback loops work, all of it is redesigned around that assumption.
That’s a much deeper change than bolting a chatbot onto a synthesis tool.
We’re not fully there yet. Most of what’s shipping today is AI-assisted EDA, old tools with new layers on top. But the next generation of platforms, the ones being built right now, look genuinely different. They expose APIs an agent can call. They produce explanations a model can reason about. They expect to be operated in a loop.
That’s the architecture that matters for the next five years.
The autonomous chip design question
Every conversation about generative AI in semiconductors eventually arrives at the same question. Will AI design chips by itself?
I’m going to give you my honest answer, which is that I don’t know, and I think anyone who tells you they do is selling something.
Here’s what I can say. For narrow blocks with well-defined specs, we’re already most of the way there. Memory controllers, standard interfaces, some classes of accelerators. Give the system a spec, some constraints, and a verification environment, and it can produce a working design with minimal human intervention.
For full SoCs with mixed-signal blocks, custom IP, advanced node physical design, multiple foundry targets, and a customer who keeps changing the requirements? Not even close. The system-level decisions, the architectural tradeoffs, the political negotiations between teams about who owns what interface, that’s still very much a human job, and I don’t see it changing soon.
My guess is we end up with a middle ground. AI handles the well-defined work autonomously. Humans do the messy, ambiguous, high-stakes parts. The total engineering effort per chip drops by maybe 30 to 50 percent over the next few years. The work that remains gets harder, not easier, because the easy parts have been automated away.
That’s a real change for how engineering teams will be structured. Fewer junior engineers doing pattern-following work. More senior engineers reviewing AI output. A new role somewhere in the middle that we don’t have a name for yet, part architect, part verification lead, part AI wrangler.
What teams should actually do about it
If you’re running a design team in 2026, here’s the practical question. Where do you start?
Don’t start with RTL generation. That’s the flashy demo, but the impact is modest and the risk of bad code making it into your design is real.
Start with verification. Specifically, start with regression triage. The data is structured, the failure modes are repetitive, and the win is measurable. You’ll know within a month whether it’s working.
Then move to coverage closure. Then to stimulus generation for hard-to-hit scenarios. By the time you’re running AI agents end-to-end in your verification environment, your team will have built the muscle to evaluate AI output critically, which is the skill that will matter most for everything that comes after.
For RTL work, my advice is narrower. Use copilots for boilerplate, not for novel logic. Have a senior engineer review every line that lands in the design. Treat AI-generated code as a contribution from a smart but unfamiliar new hire. Useful, but not yet trusted.
The thing I keep coming back to
What I find interesting about this moment isn’t the technology itself. It’s what the technology reveals about the work.
For thirty years, semiconductor engineering has been a field where a huge amount of the labor was repetitive, well-defined, and tractable to automation. We just didn’t have the automation. Now we do. And the engineers who thrive in the next decade will be the ones who figure out which parts of their job were always meant to be done by a machine, and which parts are actually about judgment, taste, and the kind of context nobody bothered to write down.
That’s a more interesting job than the one we had before. It’s also a harder one.
But it’s the job, and it’s already here.