About the Role
We are looking for DFT Engineers experienced in scan insertion, ATPG, and test methodologies for advanced ASIC designs.
Job Description
- Implement DFT architecture and scan methodologies
- Perform ATPG and fault coverage analysis
- Work on MBIST/LBIST integration
- Support silicon bring-up activities
Responsibilities
- Scan insertion and verification
- ATPG pattern generation
- Test coverage analysis
- Debug DFT-related issues
- Collaborate with design and PD teams
Required Skills
- DFT flow knowledge
- ATPG and scan methodologies
- Experience with Tessent/Synopsys tools preferred
- Scripting skills preferred
